Chip technology: Intel presents its latest FinFET process family
"Intel 3" is the name of Intel's latest chip production process with FinFET transistors. It is the first interesting one for external customers such as Nvidia.
A wafer with Meteor Lake dies that still use Intel 4 technology.
(Image: c't)
Intel publishes an unusually large number of details on the latest "Intel 3" production technology. This is because the contract manufacturing division Intel Foundry is expecting considerable interest from external customers for this production technology. Rumor has it that these include Nvidia. With the Xeon 6700E, Intel is already supplying the first (server) processors with Intel 3 technology.
In principle, Intel 3 is closely related to Intel 4; Intel uses the latter technology for the compute die of the Core Ultra 100 (Meteor Lake) mobile processor series. The number "3" in the designation alludes to the competing production processes TSMC N3 and Samsung SF3, against which Intel is competing.
Same nanometers, but still better
At first glance, many key metrics between the 4 and 3 processes are identical, such as the distance between the individual gate electrodes (50 nanometer Contacted Poly Pitch/CPP) and between transistor "fins" (30 nanometer Fin Pitch). Nevertheless, Intel has made considerable improvements to the manufacturing process, which are akin to a generational leap.
Whereas with Intel 4 the manufacturer only produced a single standard library with high-performance cell blocks, with Intel 3 there are also more densely packed high-density libraries. Intel's high-density transistors use two instead of three fins per current flow direction for switching. Unlike TSMC's N3(E), however, it is apparently not possible to mix the different transistor types on the same chip in order to optimize different components differently.
(Image: Intel)
This would nominally reduce the switching speed of the transistors because less current can flow through them. Nevertheless, the possible maximum clock frequency increases thanks to numerous design improvements. Intel speaks of up to 18 percent more performance with the same electrical power consumption when switching from Intel 4 with high-performance cell blocks to Intel 3 with high-density libraries.
A diagram shows a clock curve up to 5.1/5.2 GHz under "healthy" voltages. Since the fastest Meteor Lake processor Core Ultra 9 185H already achieves 5.1 GHz when boosted, 5.5 GHz and more should also be possible with Intel 3.
(Image: Intel)
Optimizations around the transistor
Intel has improved the clock performance by, among other things, widening the bottom metal layer (M0 layer), which interconnects the transistors. Some power lines have been moved from the M1 to the M0 layer so that there is more space for signal routing in the former.
Intel has also made the transistor contacts narrower in order to reduce the distances to the gate electrodes and vias, which reduces resistance and capacitance.
(Image: Intel)
A high-density cell block with a CMOS transistor pair has a height of 210 nm instead of 240 nm as in the high-performance type. Applied to an entire chip, this should save up to ten percent of the area. The company has not yet provided any metrics on the Intel 3 High Performance library, in particular the clock behavior.
Long-standing production processes
Intel 3 makes Intel 4 complete, so to speak. Apart from the additional high-density blocks, the chip contract manufacturer allows more design scope for optimization. While Intel 4 was only designed for chips with 18 metal layers, customers can now use Intel 3 processors with 14, 18 and 21.
The current flows to the transistors through the metal layers, which also contain the signal paths. With 14 layers, chip designers save production costs, with 21 they can improve the performance characteristics.
Intel is also broadening the range of the 3 generation in future. Intel 3-T will receive improvements to the vias for stacking chips, primarily with interposer technology.
Intel 3-E is designed for interfaces and analog chip components and is therefore particularly suitable for I/O chiplets, for example with PCI Express and USB interfaces as well as WLAN logic.
Intel 3-PT is intended to bring further performance improvements, coupled with the optimizations of the other variants. Intel also explicitly wants to enable chip stacks with so-called hybrid bonding. This involves stacking chips without solder joints: the silicon is ground flat and precisely stacked so that the contact tips and surfaces adhere sufficiently strongly to each other. AMD and its chip contract manufacturer TSMC use this technology for the Ryzen X3D processors with stacked cache.
(Image: Intel)
Designed for many years
The 3rd generation is intended to be a long-lasting production process both for Intel itself and for external customers, meaning it will remain relevant for years to come. However, a large wave of customers is expected to come with Intel 18A technology; customers could design compute dies with 18A, for example, and couple cheaper I/O dies with Intel 3-E. With 20A and the improved 18A version, Intel is introducing the Gate-All-Around (GAA) transistor design, which replaces the previous FinFETs.
Allegedly, Nvidia is also interested in the production for possible ARM notebook CPUs.
(mma)
