It gets faster later: Delays with PCIe 6.0 and 7.0
The PCI-SIG, the developers of the fast connection technology, had to admit delays in the upcoming standards at its developer conference.
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- Lutz Labs
Work on the upcoming PCIe versions is progressing – but more slowly than originally planned. The first products with PCIe 6.0 were supposed to be released this year, but there is not much time left: conformance tests were originally scheduled for March; now the Peripheral Component Interconnect Special Interest Group (PCI-SIG) is aiming to start at least a preliminary test phase in the second quarter of 2024. The specifications for PCIe 6.0 have been ready for more than two years.
There are also delays with PCIe 7.0. Although the final specification is to be created next year, the PCI-SIG has already postponed the conformance tests previously scheduled for 2027 to 2028.
Up to 512 GByte/s
As usual, PCIe 6.0 will double the speed of PCIe 5.0, and version 7.0 will double it again. A card connected via 16 lanes could then read and write 256 GByte/s simultaneously with version 7.0, a single lane up to 16 GByte/s in each direction – for which current M.2 SSDs with PCIe 5.0 still require four lanes. The PCI-SIG calculates with double the values due to the dual-simplex operation; a current 5.0 SSD would achieve a maximum of more than 26 GByte/s in practice, 14 for reading and 12 for writing.
As part of the developer conference, there was also an update from the Optical Workgroup. This group has been working on an optical implementation of the standard since last year, as the copper cables used to date are increasingly becoming a problem at high frequencies. The use of optical connections is now being considered for PCIe 6.0, but details are not yet known.
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