Many chips become more expensive: TSMC raises wafer prices
TSMC is asking Nvidia in particular to pay. The chip contract manufacturer apparently also wants to benefit from the AI boom.
![A chip with visible transistor structures](https://heise.cloudimg.io/width/610/q85.png-lossy-85.webp-lossy-85.foil1/_www-heise-de_/imgs/18/4/6/3/2/3/8/9/Fab14inc008_928_0-24f41363adee4f11.jpeg)
(Image: Taiwan Semiconductor Manufacturing Co., Ltd.)
The world's largest chip contract manufacturer TSMC is reportedly increasing the prices for its services over the next two years. This is said to affect the current production generations N3, N4 and N5, their descendants such as N3E, but also so-called advanced packaging technologies. This refers to the combination of different chips to form a processor or accelerator.
The price increases will primarily affect Nvidia and AMD because TSMC apparently wants to raise the prices of the N4 and N5 production stages the most - by around 10 percent by the end of 2025. AMD and Nvidia are the main customers for these processes. The investment bank Morgan Stanley (via X) and Taiwanese media are reporting on the price increases. A 300 mm wafer should then cost around 20,000 instead of 18,000 US dollars.
TSMC is thus taking a bigger slice of the AI cake. Nvidia in particular earns huge sums of money by selling AI accelerators to Microsoft, Google & Co. huge sums of money. In comparison, TSMC's revenue has increased only moderately – from around 16.7 billion US dollars in the first quarter of 2023 to 18.9 billion at the beginning of 2024.
Processors and accelerators are becoming more expensive
Nvidia has its Hopper and Blackwell accelerators as well as GeForce graphics cards (Ada Lovelace aka RTX 4000, Blackwell aka RTX 5000) produced with the N4P offshoot 4NP. AMD currently relies on N4 and N4P technology for all CPU chipsets of the current Ryzen and Epyc generations. The GPU chiplets of the Radeon RX 7000 graphics cards are produced in an N5 process.
In absolute terms, the price increases are most noticeable in Nvidia's upcoming Blackwell accelerators B100 and B200 . Each of them uses two GPU dies measuring at least 800 mm². Even with a perfect yield, a wafer with a diameter of 300 mm yields far fewer than 100 such dies, meaning that one wafer is not even enough for 50 cards. Added to this are the costs for the HBM3e memory and packaging, among other things.
In the case of 3-nanometer production, Apple is said to have agreed to a price increase of three to four percent after long rounds of negotiations. Prices for other customers such as AMD and Intel are also expected to rise by the same amount as soon as they switch to the N3 generation.
Packaging scarce and more expensive
The so-called CoWoS (Chip on Wafer on Substrate) as an advanced packaging technology is to get 20 percent more expensive for all customers over the next two years. However, the prices are unknown – all the companies involved are keeping quiet about this.
With its accelerators, Nvidia is TSMC's largest CoWoS customer, allegedly followed by AMD. Nvidia's Hopper and Blackwell and AMD's current Instinct MI accelerators combine compute dies and memory devices on a silicon interposer before the overall constructs are placed on an organic carrier.
TSMC's packaging capacity is currently the bottleneck for Nvidia's AI computer production. The chip contract manufacturer continues to expand it every month, which is directly reflected in Nvidia's business figures: Every quarter, sales of data center products increase by around four billion US dollars.
At the Computex trade fair, Nvidia CEO Jensen Huang was open to price increases at TSMC, at least in public. According to him, TSMC is undervalued on the stock market. Nvidia is going along with this because the company can dictate the prices for its accelerators due to the high demand. It simply passes on the increased production costs to its customers.
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