2 nm production: Japan's Rapidus is off to a good start

The young chip contract manufacturer Rapidus from Japan is not even three years old when pilot production using 2-nanometer technology begins. On April 1, 2025, Rapidus confirmed the start of operations in its own clean rooms. The first semiconductor plant is located in Chitose, Hokkaido. Rapidus calls the plant IIM-1 – IIM stands for Innovative Integration for Manufacturing.

Rapidus told IEEM Spectrum that the first test wafers have already been exposed and the manufacturer is ready for pilot production. Rapidus plans to produce the first prototypes in July. Rapidus CEO Atsuyoshi Koike said in April that the chip contract manufacturer was talking to industry giants such as Google, Apple, Facebook, Amazon and Microsoft about possible orders. In a statement, Rapidus later said that it was not referring to specific companies, but "the type of companies" that Rapidus was talking to.

GAAFETs with backside power delivery

Rapidus plans to start series production in large quantities in 2027. By then, 2 nm technology will no longer be dewy-eyed. The global market leader TSMC, for example, wants to start series production with the so-called N2 process this year, as does Intel Foundry with 18A.

However, Rapidus could be an alternative for small series even before 2027. The Japanese want to produce custom chips for niche markets. If Apple, Google & Co. are actually interested, AI chips for their data centers seem realistic. That would be thousands to dozens of thousands of chips, but not millions. At the same time, research into a 1 nm class production process is underway.

Two of the world's three largest providers of EDA (Electronic Design Automation) tools for chip production are already working with Rapidus: Cadence and Synopsis. Of the three world market leaders in chip EDA tools, only Siemens EDA is missing.

Just like TSMC, Samsung and Intel Foundry, Rapidus relies on the new transistor type Gate-All-Around (GAAFETs aka nanosheets). Backside power delivery, i.e. the backside power supply of the transistors, is also on the agenda. For process development, Rapidus is working together with IBM, Fraunhofer, the University of Tokyo, A*star IME from Singapore and the domestic institutions Leading-edge Semiconductor Technology Center (LSTC) and National Institute of Advanced Industrial Science and Technology (AIST), among others. Although IBM no longer operates its own semiconductor plants, it is still at the forefront of transistor research.

The necessary lithography systems come from ASML in the Netherlands. Rapidus officially confirms the use of the EUV system NXE:3800E. However, according to IEEE Spectrum, a lithography system worth more than 300 million US dollars is also said to be ready for operation. Only EUV systems with a high numerical aperture (High-NA EUV), which can expose the finest structures to date, are this expensive. Such a system costs around 350 million euros – a normal EUV imagesetter costs 150 million to 200 million.

Billions invested

The Japanese companies Denso, Kioxia, MUFJ Bank, NEC, NTT, Softbank, Sony and Toyota are nominally investing in Rapidus. However, while they are said to have invested the equivalent of millions – in the world of modern semiconductors, this is practically nothing –, most of the money comes from the Japanese government. So far, it has supported Rapidus with 1.72 trillion yen, which corresponds to around 10.5 billion euros at the current exchange rate. According to estimates, Rapidus will need a total of five trillion yen, or a good 30 billion euros, by 2027 to mass-produce 2 nm chips.

After production, Rapidus also wants to process chips in the future. To this end, the manufacturer is building a plant for advanced packaging. This explicitly involves several chiplets on a common carrier – which is why the new subsidiary is called Rapidus Chiplet Solutions (RCS). Here too, the Japanese are working together with IBM, Fraunhofer, the University of Toyko and A*star IME, the Japanese Leading-edge Semiconductor Technology Center (LSTC) and National Institute of Advanced Industrial Science and Technology (AIST).

RCS intends to use chips on advanced redistribution layers (RDL). RDLs transfer data between the chiplets, but are no longer made purely of silicon. Instead, silicon bridges and other components are integrated. TSMC, for example, wants to integrate parts of the power supply into the RDL.

(mma)