Stack memory with 36 GByte per chip: HBM4 mass production from October 2025

The fifth generation of High Bandwidth Memory is currently in use as HBM3E. After SK Hynix delivered samples of the upcoming HBM4 generation with 12 layers of 24 Gbit each back in March, mass production is now imminent. A single HBM4 stack with 2048 I/O contacts is expected to transfer up to 2 TByte per second.

Memory for Nvidia's Ruby

HBM4 is the memory standard for which Nvidia has optimized its upcoming Rubin generation of data center accelerators and which is not only expected to deliver up to 60 percent more memory speed than its predecessors, but also significantly more capacity.

The first Rubin generation should already achieve a capacity of 288 GB with eight chips, so-called stacks – so one stack must hold 36 GB. The subsequent Rubin Ultra will then have 12 stacks and could already have the maximum 16 layers envisaged for HBM4 and therefore a capacity of 48 GBytes per stack and 576 GBytes in total.

The new HBM4 is to be manufactured in a new production facility at the Cheongju site, reports the Korean industry magazine Chosun.com. The equipment required for this will be ordered as soon as the contracts with Nvidia have been signed,

For HBM market leader SK Hynix, the deal with Nvidia is important to maintain its dominant market position, as HBM3e will also come from Micron and Samsung, so another technological leap would be welcome. Nvidia will also find it difficult to sell its AI accelerators without additional memory capacity for the ever-increasing new generations of AI models.

SK Hynix relies on so-called Mass Reflow-Molded Underfill (MR-MUF) to improve heat dissipation. The manufacturer describes it as follows: "Mass reflow is a technique in which the chips are bonded together by melting the bumps between the stacked chips. Molded Underfill fills the gaps between the stacked chips with a protective material to increase durability and heat dissipation. Using a combination of reflow and molding processes, MR-MUF attaches semiconductor chips to circuits and fills the space between the chips and the bump gaps with liquid epoxy molding compound (EMC)."

TSMC technology is also used for the base die with integrated logic. The Taiwanese company can manufacture this type of die more efficiently, which is important for the waste heat characteristics of the HBM4 chips. With doubled data lines and more bits moved per clock, heat is also becoming an ever greater problem for memory chips.

(csp)