Chip manufacturer Rapidus presents its first 2-nanometer wafer

Less than three years after its foundation, Rapidus exposes the first wafers with 2-nanometer structures. Series production is set to follow in 2027.

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Colorful silicon wafers on a grey background

Rapidus' test wafer shown with 2 nm structures.

(Image: Rapidus)

3 min. read

The newly founded chip contract manufacturer Rapidus in Japan has fulfilled a large part of its self-imposed schedule. The company was founded in August 2022, construction of its first own semiconductor plant began in September 2023 and pre-series production using extreme ultraviolet (EUV) exposure technology started for the first time in April 2025. The first test chips have now been completed.

"More than 200 of the most modern semiconductor systems in the world" were commissioned by Rapidus in June 2025 , according to its own statement. This ranges from lithography systems for exposing the chips to etching systems and equipment for testing. The company probably also operates a particularly complex EUV system with a high numerical aperture (High-NA EUV). The necessary capital has so far largely come from state subsidies. The capital required for series production is estimated at 34 billion US dollars.

Rapidus' first semiconductor plant near Tokyo.

(Image: Rapdius)

Rapidus initially wants to expose silicon wafers with 2-nanometer structures. The rapid process progress is only possible thanks to collaborations: the start-up is working with IBM's development department, Fraunhofer and Japanese research institutes, for example. Although IBM itself no longer operates any semiconductor plants, it still maintains a respected research team.

Rapidus recently presented its first 2 nm wafer in a press release. The chip manufacturer remains silent on the electrical properties and yield. However, the latter is still likely to be low at present. Initial test runs typically involve small chips with simple SRAM cells.

In the semiconductor world, process names are just smoke and mirrors that do not reflect real dimensions. If Rapidus sticks close to IBM's proposal for gate all-around transistors (GAAFETs) aka nanosheets, the transistors could be tightly packed even compared to the competition. Samsung has introduced GAAFETs with its little-used 3nm generation, TSMC follows with its 2nm generation and Intel with 18A.

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Rapidus plans to start mass production of 2 nm chips in 2027. However, the company could sell chips in small batches before then. Rapidus initially wants to concentrate on customers who need custom chips in small quantities.

To this end, the chip manufacturer is focusing on a "complete single-wafer process line" that processes each wafer individually one after the other. Instead of sending dozens of exposed wafers through an acid bath, Rapidus does this with each wafer individually.

In this way, the manufacturer aims to minimize variations in the production process and obtain more reliable production data, which in turn can be useful for further optimization. Because the process does not have to be adapted to the production of large wafer quantities, Rapidus can change over its production facilities more frequently than industry giants such as TSMC. This enables the production of many different custom chips.

(mma)

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This article was originally published in German. It was translated with technical assistance and editorially reviewed before publication.