RISC-V and Linux: Ubuntu 25.10 forces brand new processors

The developers of Ubuntu are also eagerly programming for computers with processor cores with the open-source RISC-V instruction set architecture. However, the new version of Ubuntu 25.10 Questing Quokka expected in October will radically cut off old RISC-V braids. If it actually forces a processor with the RVA23 profile as previously planned, it will no longer run on any previously available RISC-V computers.

Ubuntu is still available for existing RISC-V systems, but only in versions 22.04 (Jammy), 24.04 (Noble, requires RVA20), and 25.04 (Plucky). Moreover, these are always only Ubuntu servers without a graphical desktop.

It is unclear whether Ubuntu 25.10 will finally bring GPU support for RISC-V processors. Several RISC-V chips contain GPU technology from Imagination Technologies, which has been working on open drivers for years.

For comparison: The Fedora developers only want to build for RVA23 builds when RVA23 hardware is available. Even the recently released Debian 13 “Trixie” for RISC-V only requires RV64GC.

RVA23 shortages

The RVA23 profile was only ratified in the fall of 2024, but some developer companies had already announced compatible RISC-V cores, such as SiFive's P870 in several variants.

However, it usually takes several years before a CPU core available as a software macro (IP core) appears in a finished semiconductor chip, which can then sit together with other components on a single-board computer, for example. So far, heise online is not aware of any announcement of a system-on-chip (SoC) with SiFive P870.

The XuanTie brand, which belongs to the large Chinese tech group Alibaba via the DAMO Academy, has announced its XuanTie C930 with RVA23. However, a specific C930 chip has not yet been announced. However, Zhihe Computing, another Chinese company, is building unspecified XuanTie cores into an SoC called Archimedes A210 for edge servers. Its launch date is unclear.

The Chinese company SpacemiT (aka Jindie Space-Time/进迭时空) already sells RISC-V chips such as the SpacemiT K1 (aka Ky X1). It contains X60 cores that are reminiscent of the XuanTie C908. SpacemiT has announced several new cores and chips, namely the X100 (initially with RVA22, now with RVA23) and X200 (with RVA23) cores, as well as the VitalStone V100 server SoC with X100 cores. SpacemiT is also said to be working on a K3 with X100 cores, but there is no mention of this on the company's website.

At the Hot Chips conference, Condor Computing, an offshoot of the Taiwanese company Andes Computing, will present the RVA23-compatible Cuszo. Andes itself offers the AndesCore X66.

All in all, there is currently only one concretely announced RVA23 chip. Nevertheless, AndesCore X66, Condor Cuzco, SiFive P870, SpacemiT X100/X200, and XuanTie C930 give us hope.

UltraRISC is another Chinese company working on a new RISC-V SoC called UR-DP1000, which Milk-V intends to solder onto the Milk-V Titan mini-ITX board. It contains UR-CP100 cores with RVA22 and hypervisor, but without RVA23 and vector units. The UR-DP1000 also does without a GPU and only offers USB 2.0, but Gigabit Ethernet and several PCI Express lanes as well as a memory controller for exchangeable DDR4 memory modules. A UEFI BIOS could make it easier to boot different Linux distributions without specific adaptations. But probably not from Ubuntu 25.10.

RVA23 advantages

For several years now, Linux distributions for RISC-V have usually only used the functions described by RV64GC. However, SoCs with this technology usually turned out to be very weak in benchmarks.

Among other things, RVA23 describes vector arithmetic units (V) and a hypervisor extension (H) for virtualization. In addition, RVA23 cores must also process a series of commands that accelerate cryptographic algorithms.

The RVA23 designs announced so far have a stronger impact than their predecessors, regardless of RVA23. Most of them involve out-of-order architecture with longer computing pipelines and finer manufacturing processes are to be used, which could result in larger caches and clock frequencies well above 2 GHz.

(ciw)