Consortium recommends "glass chip factory" for Europe
Instead of investing in super-expensive chip giant projects, funding should flow into open, trustworthy, and scalable manufacturing modules.
Wafers in a Bosch chip factory.
(Image: Bosch)
The concept for an “European Reference Fab” aims to strengthen chip manufacturing in Europe. It targets sovereign and affordable production of trustworthy semiconductor components. Through disclosed development tools and flexible chiplet packaging technology, even smaller companies should be able to have innovative chips manufactured.
The concept recommends the establishment of a “glass reference fab” with industry partners and European funding, initially for chips with 130- and 65-nanometer structures. This blueprint could then be implemented or modified by other chip manufacturers later, depending on their needs.
Scaling in multiple dimensions
The experts of the HEP consortium assume that a European Reference Fab for the production of 65-nanometer structures on 300-millimeter wafers can be built with investments of a few billion euros. This would be significantly cheaper than a fab for chips with finer structures.
At the same time, the demand for chips in the 65-nanometer class and above from European industrial companies is high; this is currently evidenced by the problems due to bottlenecks at Nexperia.
Later, the fabs could be retrofitted for the production of finer structures at relatively low cost. The most important thing is that the European reference workflow is offered by several competing companies.
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Disclosed Design Workflow
The use of open-source chip design software (Electronic Design Automation tools, EDA tools) and disclosed Process Design Kits (PDKs) is important for several reasons. Firstly, chips manufactured with them can be more easily audited, i.e., checked for unintentional errors or intentionally built-in backdoors. This is essential for security-critical components such as Trusted Platform Modules/Roots of Trust (TPM/RoT) as well as for military applications. Europe has a significant overall need here.
Secondly, open development tools also make it easier for smaller companies to develop custom chips. Many of the design flows required by large contract manufacturers demand the use of certified proprietary EDA tools from companies such as Cadence, Synopsys, or Siemens, which can be very expensive.
Thirdly, open EDA software can protect against excessive dependence on individual providers, provided there are enough competitors.
Packaging and Chiplets
The authors of the concept for the European Reference Fab also place great importance on the chip manufacturing steps of testing and packaging. This involves functional and quality testing of individual dies on a wafer, singulation of the dies, creation of contacts, and assembly of the dies into packages. An open and flexible chiplet technology should also be planned for this. The combination of application-specific (ASIC) chiplets with chiplets from other suppliers via standardized interfaces such as UCIe enables the relatively rapid adaptation of chips to different application areas and markets.
To use the Nexperia example again: The cause of some problems lies in the fact that numerous fabs for Test & Packaging are located in Asia, including in China. A counterexample is the OSAT provider Amkor (outsourced semiconductor assembly and Test/OSAT), which is building capacity in Portugal and cooperating with Infineon.
The HEP Alliance aims for “Hardening the value chain through open source, trusted EDA tools and processors.” This involves open and trustworthy development tools for chips, also to strengthen digital sovereignty. Partners include companies such as Bosch, Swissbit, and Hensoldt Cyber. Hensoldt Cyber itself is developing a security chip with RISC-V technology for military applications, among others.
(ciw)
