Internal USB 2.0 with USB 3.0 speed
The Embedded USB 2.0 V2 specification increases the transfer rates of embedded USB 2.0 controllers to up to 4.8 Gbit/s, for example for notebook webcams.
USB-A socket with USB 3.0 SuperSpeed
(Image: c’t Magazin)
The USB 3.0 specification appeared around 16 years ago and increased the maximum speed of USB data transfers tenfold from 480 Mbit/s (USB 2.0 High-speed) to 5 Gigabit/s (SuperSpeed, now known as USB 3.2 Gen 1). However, USB 3.0 introduced new cables, plugs, and sockets because the SuperSpeed signals travel over two additional pairs of wires: one each for sending and receiving differential signals, similar to PCI Express (PCIe lane).
The eUSB 2.0 V2 (eUSB2V2) specification for embedded USB 2.0 dispenses with the additional cable paths of USB 3.x and makes do with the two simple signal paths D+ and D- from the USB Stone Age. However, eUSB2V2 chases much more data per second, namely integer multiples of 480 Mbit/s up to 4.8 Gbit/s.
In doing so, eUSB2V2 expressly dispenses with external cables, sockets, plugs, and hubs. A maximum of one retimer chip in the signal path and one internal connector, which is not standardized, are permitted.
Predecessor: eUSB 2.0
(Image:Â USB-IF)
The eUSB2V2 1.0 specification was published in August 2024 and incorporates concepts from the older specification for Embedded USB2 (eUSB2). The latter, for example, reduced the signal voltage on the D+/D- lines from 3.3 to 1.2 or 1.0 volts. This makes it easier to integrate an eUSB2 controller into chips with finer structures, as smaller transistors tend to tolerate less voltage.
eUSB2V2 1.0 now works with a voltage difference of just 0.36 to 0.8 volts.
Application: Better webcams
eUSB2V2 is primarily intended for the cost-effective internal connection of built-in webcams in notebooks and similar devices. On the one hand, 480 Mbit/s is no longer sufficient for high-resolution video signals, on the other hand, standardized transmission methods for higher data rates such as USB 3.x or MIPI CSI-2 require more signal paths.
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In addition, many chips require at least one USB 2.0 controller anyway, so the integration of an eUSB2V2 controller can reduce the development effort compared to the installation of another interface. Providers of EDA tools for designing chips, including Cadence, already offer eUSB2V2 as an intellectual property core (IP core).
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(ciw)
